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1. general description the nx5p1100 is an advanced power swit ch and esd-protection device for usb otg applications. it includes under voltage and over voltage lockout, over-current, over-temperature, reverse bias and in-rush current protection circuits. these circuits are designed to isolate a vbus otg voltage source from a vbus interface pin automatically when a fault condition occurs. the device feat ures two power switch terminals, one input (vint) and one output (vbus). it has a cu rrent limit input (ilim) for defining the over-current and in-rush current limit. a voltage detect output (vdet) is used to determine when vint is in the correct voltage r ange. an open-drain fault output (fault ) indicates when a fault condition has occurred, and an enable input (en) controls the state of the switch. when en is set low the device enters a low-power mode, disabling all protection circuits except the undervoltage lockout. th e low-power mode can be entered at anytime unless the over temperature protec tion circuit has been triggered. designed for operation from 3 v to 5.5 v, it is used in power domain isolation applications to protect from out of range operation. the enable input includes integrated logic level translation making the device compatible with lower voltage processors and controllers. 2. features and benefits ? wide supply voltage range from 3 v to 5.5 v ? 30 v tolerant on vbus ? i sw maximum 1 a continuous current ? very low on resistance: 100 m ? (maximum) at a supply voltage of 4.0 v ? low-power mode (ground current 20 ? a typical) ? 1.8 v control logic ? soft start turn-on slew rate ? protection circuitry ? over-temperature protection ? over-current protection with low current output mode ? reverse bias current/back drive protection ? overvoltage lockout ? undervoltage lockout ? analog voltage limited vbus monitor path ? esd protection: ? hbm ansi/esda/jedec jds-001 class 2 exceeds 2 kv ? cdm aec standard q100-011 category c6 exceeds 1 kv ? iec61000-4-2 contact discharge exceeds 8 kv for pins vbus, d ? , d+ and id ? specified from ? 40 ? c to +85 ? c nx5p1100 logic controlled hig h-side power switch rev. 1 ? 21 march 2014 product data sheet
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 2 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 3. applications ? usb otg applications 4. ordering information 5. marking 6. functional diagram table 1. ordering information type number package temperature range name description version nx5p1100uk ? 40 ? c to +85 ? c wlcsp12 wafer level chip-s cale package; 12 bumps; 1.36 x 1.66 x 0.51 mm, 0.4 mm pitch (backside coating included) nx5p1100 table 2. marking codes type number marking code nx5p1100uk nx5pb fig 1. logic symbol ddd ( 1 9,17 9'(7 ,/,0 )$ 8/7 9%86 ' ' ,'
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 3 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 7. pinning information 7.1 pinning 7.2 pin description fig 2. logic diagram (simplified schematic) ddd ' ,' 9%86 ' 29(5&855(17 3527(&7,21 89/229/2 3527 &21752/ ,/,0 9,17 9'(7 (1 )$8/7 ?& 3527 5(9(56(&855(17 3527(&7,21 p$ &855(176285&( fig 3. pin configuration wlcsp12 package fig 4. ball mapping for wlcsp12 ddd $ % & ' edoo$ lqgh[duhd 7udqvsduhqwwrsylhz 1;3 ddd 9,17 9%86 (1 ,/,0 *1' ' 9%86 , ' ' $ % & ' 7udqvsduhqwwrsylhz 1;3 9'(7 9,17 )$8/7 table 3. pin description symbol pin description vint a1, b1 internal circuitry voltage i vbus a3, b3 external connector voltage o en c1 enable input (active high) i ilim d1 current limiter i/o
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 4 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 8. functional description [1] h = high voltage level; l = low voltage level, z = high-impedance off-state, x = don?t care. 8.1 en input a low on en disables the n-channel mosf et and the device enters low-power mode. in low-power mode, all protection circuits are disabled except for the undervoltage lockout circuit. a high on en, enables the protecti on circuits and then enables the n-channel mosfet. 8.2 fault output the fault output is an open-drain output that re quires an external pull-up resistor. if any of the uvlo, ovlo, rcp, ocp or otp circuits are activated the fault output is set low. a low indicates that a fault has occurred. the fault output returns to the high impedance state automatically once the fault condition is removed. vdet a2 vbus voltage level indicator o fault b2 fault condition indicator (open-drain; active low) gnd c2 ground (0 v) d- d2 esd-protection i/o d+ d3 esd-protection i/o id c3 esd-protection i/o table 3. pin description ?continued symbol pin description table 4. function table [1] en vint vbus fault operation mode x 0 v z l no supply x 0 v < 30 v z disabled; switch open x < 3.2 v z l undervoltage lockout; switch open h > 5.5 v z l overvoltage lockout; switch open h 3.2 v to 5.5 v z l over-t emperature; switch open l 3.2 v to 5.5 v z z disabled; switch open h 3.2 v to 5.5 v vbus = vint z enabled; switch closed; active h 3.2 v to 5.5 v 0 v to vint l over-current; switch open; constant current on vbus h 3.2 v to 5.5 v 0 v to vint l when ilim is connected to gnd, vbus is supplied with 10 ma current source h 3.2 v to 5.5 v vint + 30 mv < vbus < vint + 0.45 v (> 4 ms) l reverse bias current/back drive; switch open h 3.2 v to 5.5 v vbus > vint + 0.45 v l reverse bias current/back drive; switch open table 5. function table vdet versus vbus vbus vdet operation mode 3 v < vbus < 30 v 1.5 < vdet < 5.5 v vdet detects vbus voltage; see figure 22 .
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 5 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 8.3 vdet output vdet is an analog output that allows a controller to monitor the voltage level on vbus. 8.4 undervoltage lockout (uvlo) when vint < 3.2 v, the uvlo circuit is trigge red. it disables the n-channel mosfet sets the fault output low and the device enters low-power mode. once vint > 3.2 v, the en pin controls the state of the n-channel mosfet. the uvlo circuit remains active in low-power mode. 8.5 overvoltage lockout (ovlo) when en is high and vint > 5.75 v, the ovlo circuit is triggered. it disables the n-channel mosfet and sets the fault output low. the ovlo circuit is disabled in low-power mode and does not influence the fa ult output state. if the ovlo circuit is triggered, setting the en pin low returns the device to low-power mode. 8.6 over-current protection (ocp) if either of these two conditions occur for lo nger than 8 ms, the ocp circuit is triggered. 1. current through the n-channel mosfet exceeds i trig . 2. vbus < vint ? 200 mv. during the 8 ms trigger delay, the maximum current is clamped at i ocp . the ocp disables the n-channel mosfet; supplies vbus from the 10 ma current source (i o ), and sets fault low. when vint > vbus > vint - 200 mv for 20 ? s, the ocp circuit is disabled. en controls the state of the n-channel mosfet, the 10 ma current source is disconnected and fault is set high impedance. if the ocp circuit is active, setting the en pin low returns the device to low-power mode. (see figure 23 , figure 24 , figure 25 , figure 26 ) 8.7 ilim the ocp trigger value i trig , is set using an external resistor r ilim connected to the ilim pin (see figure 6 ). when en is high and ilim is grounded, vbus is supplied by the 10 ma current source and fault is set low. 8.8 over-temperature protection (otp) when en is high, if the de vice temperature exceeds 125 ? c, the otp circuit is triggered. it disables the n-channel mosfet and sets fault low. any transition on en has no effect. once the device temperature decreases to below 115 ? c the device returns to the defined state. the otp circuit is disabled in low-power mode. if the otp circuit is active, setting the en pin low does not return the device to low-power mode.
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 6 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 8.9 reverse bias current/b ack drive protection if either of these two conditions occur, the rcp circuit is triggered. 1. (vint + 30 mv) < vbus < (vint + 0.45 v) for longer than 4 ms. 2. vbus > (vint + 0.45 v) it disables the n-channel mosfet and sets fault low. once vbus < vint for longer than 4 ms the device returns to the defined stat e. if the rcp circuit is active, setting the en pin low returns the device to low-power mode. 8.10 in-rush current protection the n-channel mosfet can be enabled via the en pin or via a recovering fault condition. when enabled, the in-rush current protection circuit limits the current while vbus increases to vint ? 200 mv. the resistor connected to ilim determines the current limit. the in-rush current protection circuit is disabled in low-power mode. 9. application diagram the nx5p1100 typically connects a voltage source on vint to the vbus of a usb connector supporting usb3 otg in a portable, battery operated device. the external resistor r ilim sets the maximum current limit threshold. the fault signal requires an external pull-up resistor. fig 5. nx5p1100 application diagram ddd ' &? q) ,' *1' 9%86 ' 29(5&855(17 3527(&7,21 89/229/2 3527 &21752/ 86%27*9%86 92/7$*( 6285&( $1' &21752/ ,/,0 9,17 9'(7 5 sx 5 ,/,0 & ) (1 )$8/7 ?& 3527 5(9(56(&855(17 3527(&7,21 p$ &855(176285&(
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 7 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 10. limiting values [1] the minimum and maximum switch voltage ratings may be e xceeded if the switch clamping current rating is observed. [2] the minimum input voltage rating may be exceeded if the input current rating is observed. [3] the (absolute) maximum power dissipa tion depends on the junction temperature t j . higher power dissipation is allowed at lower ambient temperatures. the conditions to determine the specified values are t amb = 85 ? c and the use of a two layer pcb. 11. recommended operating conditions 12. thermal characteristics [1] r th(j-a) is dependent upon board layout. to minimize r th(j-a) , ensure that all pins have a solid connec tion to larger copper layer areas. in multi-layer pcbs, the second layer should be used to create a la rge heat spreader area below the device. avoid using solder-sto p varnish under the device. table 6. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v i input voltage vbus [1] ? 0.5 +32 v vint [1] ? 0.5 +6.0 v en, ilim [2] ? 0.5 vint + 0.5 v d-, d+, id [1] ? 0.5 +6.0 v v o output voltage fault ? 0.5 +6.0 v i ik input clamping current en: v i < ? 0.5 v ? 50 - ma i sk switch clamping current vbus; vint; v i < ? 0.5 v ? 50 - ma i sw switch current t amb = 85 c - ? 1000 ma t j(max) maximum junction temperature ? 40 +125 ?c t stg storage temperature ? 65 +150 ?c p tot total power dissipation [3] - 100 mw table 7. recommended operating conditions symbol parameter conditions min max unit v i input voltage vint 3.0 5.5 v en, ilim 0 vint v v o output voltage vbus; en = low 0 30 v v i/o input/output voltage d-, d+, id 0 5.5 v t amb ambient temperature ? 40 +85 ?c table 8. thermal characteristics symbol parameter conditions typ unit r th(j-a) thermal resistance from junction to ambient [1] 73 k/w
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 8 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 13. static characteristics [1] typical values are measured at t amb =25 ? c and v i(vint) = 5.0 v unless otherwise specified. [2] typical value is measured at t amb =25 ? c and v i(vbus) = 5.0 v. table 9. static characteristics v i(vint) = 4.0 v to 5.5 v; unless otherwise specified; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = 25 ?c t amb = ? 40 ? c to +85 ?c unit min typ [1] max min max v ih high-level input voltage en input 1.2 - - 1.2 - v v il low-level input voltage en input - - 0.4 - 0.4 v v o output voltage vdet; i vdet = ? 2 ma; 3 v < vbus < 30 v 1.5 - 5.5 1.5 5.5 v v ol low-level output voltage fault , i o =8ma - - 0.5 - 0.5 v i o output current current source; en = high - 10 - 8 15 ma i trig trigger current ocp trigger; en = high; see figure 6 --- - -ma i ocp overcurrent protection current en = high; see figure 6 -i trig +250 - i trig +150 i trig +350 ma r pu pull-up resistance fault 20 - 200 - - k ? v pu pull-up voltage fault --vint- vintv r ilim current limit resistance ilim 40 - 300 40 300 k ? i gnd ground current vbus open; en = low; see figure 7 and figure 8 -20- - 40 ? a vbus open; en = high; see figure 7 and figure 8 - 220 - - 360 ? a i off power-off leakage current vbus = 0 v to 30 v; vint = 0 v; see figure 9 [2] -2 - - 22 ? a i s(off) off-state leakage current vbus = 0 v to 30 v; see figure 10 and figure 11 [2] -2 - - 22 ? a v uvlo undervoltage lockout voltage 3.0 3.2 3.4 3.0 3.4 v v ovlo overvoltage lockout voltage 5.5 5.75 6.0 5.5 6.0 v v hys(ovlo) overvoltage lockout hysteresis voltage - 150 - - - mv c i/o input/output capacitance d-, d+, id - 3 - - - pf c i input capacitance en - 2 - - - pf c s(on) on-state capacitance -0.2- - 1nf
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 9 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 13.1 graphs v i(vint) = 5 v; t amb = 25 ? c. (1) i ocp (2) i trig (1) enabled (2) disabled fig 6. typical ocp trigger current and overcurrent protection current versus the external resistor value. fig 7. typical ground current versus temperature 5 ,/,0 n ddd , rfs $ , wulj $ 7 dpe ?& ddd , *1' ?$ (1) t amb = 85 ? c (2) t amb = 25 ? c (3) t amb = ?40 ? c fig 8. typical ground current versus input voltage fig 9. typical power-off leakage current versus input voltage on pin vbus 9 ,(1 9 ddd , *1' ?$ ddd 9 ,9%86 9 , 2)) $
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 10 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 13.2 on resistance 13.3 on resistance test circuit and waveforms (1) t amb = 85 ? c (2) t amb = 25 ? c (3) t amb = ?40 ? c (1) v i(vbus) = 15.0 v (2) v i(vbus) = 10.0 v (3) v i(vbus) = 5.0 v fig 10. typical off-state leakage current versus input voltage on pin vbus fig 11. typical off-state leakage current versus temperature ddd 9 ,9%86 9 , 62)) ?$ 7 dpe ?& ddd , 62)) ?$ table 10. on resistance at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v) symbol parameter conditions t amb = 25 ?c t amb = ? 40 ? c to +85 ?c unit min typ max min max r on on resistance switch enabled; i load = 200 ma; see figure 12 , figure 13 and figure 14 v i(vint) = 4.0 v to 5.5 v - 60 - - 100 m ? r on = v sw / i load . fig 12. test circuit for measuring on resistance ddd (1 9 9%86 9,17 *1' , /2 $' 9 , 9 6:
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 11 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 14. dynamic characteristics [1] guarantee by design. (1) v i(vint) = 5.5 v (2) v i(vint) = 4.0 v (1) t amb = 85 ? c (2) t amb = 25 ? c (3) t amb = ?40 ? c fig 13. typical on resistance versus temperature fig 14. typical on resistance versus input voltage 7 dpe ?& ddd 5 21 p 9,179 ddd 5 21 p table 11. dynamic characteristics at recommended operating conditions; voltages are re ferenced to gnd (ground = 0 v); for test circuit, see figure 16 . v i(vint) = 4.0 v to 5.5 v. symbol parameter conditions t amb = 25 ?c t amb = ? 40 ? c to +85 ?c unit min typ max min max t en enable time en to vbus; see figure 15 - 0.18 - 0.14 - ms t dis disable time en to vbus; see figure 15 -1.5- - - ms t on turn-on time en to vbus; see figure 15 - 0.63 - 0.52 - ms t off turn-off time en to vbus; see figure 15 -34.5 - - - ms t tlh low to high output transition time vbus; see figure 15 - 0.39 - 0.16 - ms t thl high to low output transition time vbus; see figure 15 -33 - - - ms t degl deglitch time vint; while enabled; see figure 23 [1] -8 - - - ms
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 12 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 14.1 waveforms, graphs and test circuit measurement points are given in table 12 . logic level: v oh is the typical output voltage that occurs with the output load. fig 15. switching times ddd (1lqsxw 9%86rxwsxw w rii 9 , *1' 9 0 9 ; 9 < 9 2+ *1' w rq w 7/+ w 7+/ w hq w glv table 12. measurement points supply voltage en input output v i(vint) v m v x v y 4.0 v to 5.5 v 0.5 ? v i 0.9 ? v oh 0.1 ? v oh test data is given in table 13 . definitions test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. v ext = external voltage for measuring switching times. fig 16. test circuit for measuring switching times ddd (1 9,17 9 , 9 (;7 * & / 5 / 9%86 table 13. test data supply voltage input load v ext v i c l r l 4.0 v to 5.5 v 1.5 v 100 ? f1 5 0 ?
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 13 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch en = 1.5 v; vint = 4 v; r l = 150 ? ; c l = 220 ? f; r ilim = 50 k ? ; t amb = 25 ? c. (1) en (2) vbus (3) i i(vint) en = 1.5 v; vint = 5.5 v; r l = 150 ? ; c l =220 ? f; r ilim =50k ? ; t amb = 25 ? c. (1) en (2) v bus (3) i i(vint) fig 17. typical enable time and in-rush current fig 18. typical enable time and in-rush current wpv ddd (1 9%86 9 , 9,17 $ wpv ddd (1 9%86 9 , 9,17 $ en = 1.5 v; vint = 4 v; r l = 150 ? ; c l = 100 ? f; t amb = 25 ? c. en = 1.5 v; vint = 4 v; r l = 150 ? ; c l = 100 ? f; r ilim =50k ? ; t amb = 25 ? c. fig 19. typical enable time versus current limit resistance (r ilim ) fig 20. typical disable time 5 ,/,0 n ddd w hq ?v wpv ddd 9%86 9
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 14 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch en = 1.5 v; vint = 5.5 v; r l = 150 ? ; c l = 100 ? f; r ilim =50k ? ; t amb = 25 ? c. vint = 5.5 v; t amb = 25 ? c. fig 21. typical disable time fig 22. typical vdet versus vbus wpv ddd 9%86 9 9%869 ddd 9'(7 9 (1) vint (2) vbus (3) i i(vint) fig 23. ocp level definitions fig 24. ocp load curve ddd , 9%86 $ wv , 2 w ghjo pv , wulj , rfs w?v ddd , 9,17 $ 9,17 9%86 9
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 15 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch (1) vint (2) vbus (3) i i(vint) (1) vint (2) vbus (3) i i(vint) fig 25. ocp load curve fig 26. ocp load curve w?v ddd , 9,17 $ 9,17 9%86 9 wpv ddd , 9,17 $ 9,17 9%86 9 fig 27. test circuit for measuring ocp load curves ddd (1 9,17 9%86 *1' ,/,0 n ?) ?) 9 1;3 $
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 16 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 15. package outline fig 28. package outline nx5p1100 (wlcsp12) 5hihuhqfhv 2xwolqh yhuvlrq (xurshdq surmhfwlrq ,vvxhgdwh ,(& -('(& -(,7$ zofvsbq[sbsr 8qlw pp pd[ qrp plq $ 'lphqvlrqvppduhwkhruljlqdoglphqvlrqv :/&63zdihuohyhofklsvfdohsdfndjh expsv[[ppppslwfk%dfnvlghfrdwlqjlqfoxghg 1;3 $ $ e'(hh h yz \ ; edoo$ lqgh[duhd $ ( % ' & \ ghwdlo; $ $ $ ' % & $ edoo$ lqgh[duhd h h e $ &% ?y & ?z h h h pp vfdoh 1;3
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 17 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 16. abbreviations 17. revision history table 14. abbreviations acronym description cdm charged device model dut device under test esd electrostatic discharge hbm human body model mosfet metal-oxide semiconductor field effect transistor ocp overcurrent protection otp overtemperature protection rcp reverse current protection usb otg universal se rial bus on-the-go uvlo undervoltage lockout vbus usb power supply ovlo overvoltage lockout table 15. revision history document id release date data sheet status change notice supersedes nx5p1100 v.1 20140321 product data sheet - -
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 18 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 18.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
nx5p1100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights re served. product data sheet rev. 1 ? 21 march 2014 19 of 20 nxp semiconductors nx5p1100 logic controlled high-side power switch export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 18.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 19. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors nx5p1100 logic controlled high-side power switch ? nxp semiconductors n.v. 2014. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 21 march 2014 document identifier: nx5p1100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 functional description . . . . . . . . . . . . . . . . . . . 4 8.1 en input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8.2 fault output . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8.3 vdet output . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.4 undervoltage lockout (uvlo). . . . . . . . . . . . . . 5 8.5 overvoltage lockout (ovlo). . . . . . . . . . . . . . . 5 8.6 over-current protection (ocp) . . . . . . . . . . . . . 5 8.7 ilim. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.8 over-temperature protection (otp) . . . . . . . . . 5 8.9 reverse bias current/back drive protection . . . 6 8.10 in-rush current protection . . . . . . . . . . . . . . . . . 6 9 application diagram . . . . . . . . . . . . . . . . . . . . . 6 10 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 11 recommended operating conditions. . . . . . . . 7 12 thermal characteristics . . . . . . . . . . . . . . . . . . 7 13 static characteristics. . . . . . . . . . . . . . . . . . . . . 8 13.1 graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 13.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . 10 13.3 on resistance test circuit and waveforms . . . 10 14 dynamic characteristics . . . . . . . . . . . . . . . . . 11 14.1 waveforms, graphs and test circuit . . . . . . . . 12 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 18 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 18.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 contact information. . . . . . . . . . . . . . . . . . . . . 19 20 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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